| 1. | After a series of functional and time delay simulations , the design proved to be feasible and effective . the application indicates that the scheme is reasonable and the pxi - bus counter module meets the requirements of the design
本文对pxi计数器的各项功能进行了功能仿真和时序仿真,并对其进行了调试和测试,测试结果表明:模块设计方案合理、各项功能与指标均满足设计要求。 |
